Noise Reduction Techniques for LAN Printed Circuit Boards by Dallas Dean
Electromagnetic Interference (EMI) - i.e. noise - is a common problem that every designer faces when designing a PCB. There are many details that need to be addressed in order to produce a clean board, noise wise. Many times, even well designed boards can be improved. A "checklist" of the dangers that each board designer should be aware of when starting a new PCB project is included below. With proper planning, these problem areas can be avoided, thus improving board layout and minimizing EMI radiation levels.
Keys to Noise Reduction
* Proper bypass procedures for the ICs and active devices are critical. The strategic placement and orientation of components on the board is very important. Some components - especially magnetic devices (filters) - may have more magnetic fields in one direction than another. By placing them at 90 degrees from each other, the fields tend to cancel and the radiation can be reduced. Any excess radiation can produce EMI. Proper separation of magnetic switching devices also can reduce the noise radiation. The key is the proper placement of components and routing of PCB traces.
* Signal rise and fall times of the active devices and clocks must be controlled. This can be done with proper termination to prevent overshoot. If the resistive termination is too high, the signal can become under-damped, causing a faster rise time and thus overshoot. Improper terminations can produce serious noise spikes, thus increasing EMI problems.
* It is critical to keep digital lines separate from signal lines. Signal paths must be kept away from I/O lines to prevent noise coupling. Switching noises that may exist on digital lines can be radiated to the signal lines and add to the EMI problem exiting onto the cable.
* It is essential to keep differential traces as short as possible to minimize the inductance. This can influence the buildup of common mode voltages. A short trace has fewer emissions that a long one. A fat trace has fewer noise emissions than a thin one. And these lines must be symmetrical and matched for impedance. Do not allow the trace widths to change or the traces to wander from each other. This will cause an impedance mismatch and introduce return loss problems. Signal traces should be kept close to the return path. Return or ground planes should be as solid as possible, free from gaps, and thus create no current loops.
* Minimize crosstalk and common mode signals for the best EMI suppression. Different signal paths should have the proper separation from each other to reduce any radiation on the board. Balance of the traces is very important in keeping the common mode noise to a minimum. The transformer primary and secondary centertaps are decoupled to ground for the best common mode rejection below 50 Mhz. Three resistors (typically 50 ohms) are used to terminate the unused cable pair's common mode impedance. These unused pairs can act as antennas with no termination. Some success has been achieved by varying the resistances between 0 and 100 ohms. The transformer primary inductance limits the low frequency response and the leakage inductance and distributed (shunt) capacitance limit the high frequency response above 50 Mhz. Smaller values improve the return loss at the higher frequencies, thus extending the bandwidth.
* Avoid extending the ground plane under the magnetic devices to the RJ45 jack. This promotes coupling for noise. Non-media signal lines should not be in this area. All differential pair data lines to the RJ45 connection do not require a return path.
* Chassis ground can be extended to the interface module to provide additional shielding. It should not overlap an analog or digital ground. There should be a gap between the chassis and the signal grounds to reduce any coupling. Partition analog power and ground planes. Apply 45 degree trace routing in lieu of 90 degree bends - a common practice. (Forty five degree bends avoid electric field concentrations that 90 degree bends have.) This also reduces crosstalk.
* Run differential or balanced lines as a set of parallel traces. Consider the stripline, microstripline, and imbedded microstripline techniques for critical lengths. As an aid to reduce lead lengths, it is possible to incorporate the magnetics and common mode chokes into the RJ45 connector, thus reducing the trace lengths used by discrete components.